High Performance Multimedia Technology For 3G Phones

NeoMagic Corporation unveiled its new processing architecture for the MiMagic® family of Applications Processors. The architecture, called APA (Associative Processor Array), is based on sophisticated circuit structures that perform bit-level processing within an array of memory cells. The APA technology marks a significant advance in the NeoMagic tradition of enabling high-performance multimedia applications in low power, battery-operated systems.

The Performance Challenge
“There is a clear trend toward more multimedia features in handheld electronics, whether in PDAs, digital media players or mobile phones. Meeting these market needs demands ever higher levels of processing performance,” said Mark Singer, NeoMagic’s vice president of corporate marketing. “But higher clock speeds mean more power consumption – and the market for handheld battery-operated devices will not support a ‘megaHertz race’ like we have seen in the PC market. What this market needs is an architectural solution that provides more multimedia processing and consumes less power. The APA technology provides such a solution,” he noted.

According to a recent report by Weili Su, an analyst at market research firm IDC (International Data Corp., Framingham, MA), "Shannon's Law states that the number of mathematical calculations required to process current data on wireless handheld devices is set to grow ten-fold, every four years. This is at odds with Moore's Law, which states that processor performance will increase ten-fold, every six years. Hence, the burden clearly rests on processor vendors to ensure that the performance gap between algorithmic complexity and processor performance is bridged."

"The industry is seeking new architectural approaches to solving the issues of performance and power. The concept of combining storage and processing into a uniform structure is promising in this context," Su concluded.

Parallel Processing …
There are two primary differences between the APA architecture and traditional approaches to data processing. The first is the massively parallel nature of APA. Its performance is derived from operating on more data in parallel with each tick of the chip’s clock. Existing solutions use a sequential processing flow that typically implies operation on each individual data element in sequence, making use of ever-faster clocks to gain performance. With its ability to handle large amounts of data at once, the APA platform is highly optimized for multimedia data such as images, video and graphics.

“When we look at nature’s response to sensory information we see an interesting parallel,” explained Dr. Avidan Akerib, general manager of NeoMagic Israel and a principal inventor of the APA architecture. “The ear is a sequential processor. It processes sound, which comes to the eardrum as a sequence of pressure waves. The eye is a parallel processor. Its retina is an array of rods and cones, which receive and process thousands of concurrent light waves in parallel. We can take some architectural cues from this natural phenomenon – visual information is better processed in a highly parallel structure,” he noted.

… in an Intelligent Cache
The second fundamental difference between the APA architecture and today’s prevailing processing approaches such as DSPs (Digital Signal Processors) lies in the ability of the APA to both store and process data in the same structure. Current processors perform logical operations but do not retain data. They are described as “pipeline” architectures, where a data element is loaded, an operation is performed to transform the data, and the data is unloaded. For this approach to work, there must also be a separate memory structure that feeds the data in to begin the process and that receives the data back after it has been transformed.

Increasing the bandwidth to the processor from the memory and back again, has been a challenge to design engineers for decades,” said Dr. Akerib. “The most common response has been to create a cache, a smaller memory structure implemented with comparatively faster memory technology, which resides close to the processor. This approach requires more frequent movement of the data between the main memory and the cache, and between the cache memory and the processor.

Any sequential processing pipeline has the basic characteristic that data computations require the data to be moved multiple times. Dr. Akerib noted, “Within the physics of semiconductors, power is used every time data is moved. It may not be much power, but when a processor runs hundreds of millions of cycles per second, small amounts of power add up quickly. Additionally, there are relations between the elements of imaging, video or graphical data, which means that the sequential processing engine may need to load and reload the same data element many times to complete its task. The result is a rapid escalation in the power consumed by multimedia tasks.”

The APA resolves this data movement problem at the architectural level by providing a single structure which both stores and processes the data. Serving much like a data cache, the APA loads a significant amount of data from the main memory. But unlike traditional approaches, the APA processes that data within the caching memory structure, performing multiple processing steps and saving interim values as needed without unloading or reloading the data. When the processing of the data is complete, it can then be returned to the main memory, or held for the processing needs of subsequent data.

APA’s Roots
The APA architecture traces its roots to pioneering work done by Dr. Akerib in the field of image processing architectures for robotic vision and machine inspection applications. In early 1999, Dr. Akerib and his team brought this technology to NeoMagic to develop the APA architecture for mass consumer markets, with a focus on digital imaging and video processing in low-power battery-operated systems. NeoMagic has developed and demonstrated its MPEG-4 compression technology based on algorithms specifically developed for parallel processing provided by the APA architecture and is currently developing additional algorithms for video, imaging and graphics applications.

The theory, structure, and practical implementation of the Associative Processing Array are protected by multiple U.S. and international patents.

The MiMagic Product Roadmap
MiMagic is the name of NeoMagic’s family of Applications Processors for multimedia-rich handheld devices. MiMagic products combine a RISC CPU, a variety of I/O functions, and a high level of multimedia hardware into single-chip solutions that provide the heart of low-power battery operated systems with high performance multimedia capabilities. The MiMagic family supports a variety of operating systems including Microsoft Windows CEä, SymbianOSä and Embedded Linux.

The APA architecture will be a key element of future MiMagic Applications Processors. The initial APA technology applications will be MPEG-4 video compression and decompression. The company plans to also develop other forms of digital imaging and digital video, 3D graphics, and continuous speech recognition capabilities. MiMagic products incorporating the APA technology are expected to become available in the first half of 2003.