US : CEVA announced that RadioFrame Networks has licensed the CEVA-X1620 DSP core and CEVA-XS1200 subsystem for the development of next-generation femtocell base stations. RadioFrame Networks is a leader in IP-based picocell and femtocell solutions for the mobile and wireless marketplace.

Femtocell base stations are deployed to increase and improve cellular coverage and capacity indoors and to enable fixed mobile convergence (FMC) in the home. RadioFrame will utilize the high performance capabilities of the silicon-proven CEVA-X DSP and subsystem to handle the compute-intensive baseband processing for their base stations, reducing their development costs and time-to-market in the process. Greg Veintimilla, VP of Engineering at RadioFrame Networks stated, "We chose CEVA-X as the processor architecture for our next generation of femto base stations based on a number of factors including the flexibility of the solution, performance of the DSP and the excellent technical support provided by CEVA throughout the development process."

"Utilizing the CEVA-X1620 DSP and CEVA-XS1200 subsystem enables RadioFrame Networks with performance, cost and time-to-market advantages when developing solutions for the burgeoning FMC market," said Gideon Wertheizer, CEO of CEVA. "RadioFrame is widely regarded as a leading innovator of wireless infrastructure solutions and we are very pleased to announce them as a CEVA licensee." CEVA-X is the industry-leading, scalable Very Long Instruction Word -- Single Instruction Multiple Data (VLIW-SIMD) DSP architecture that delivers breakthrough performance and low power consumption in a fully programmable framework.

The CEVA-X1620 is a dual MAC 16-bit, fixed point, fully synthesizable DSP core, running up to eight instructions simultaneously. It provides variable instruction widths, two-level memory architecture and up to 4G bytes of addressable memory space. It has been licensed and adopted by major semiconductor manufacturers in the 3G baseband and mobile multimedia markets. The CEVA-XS1200 system platform is a low-power, highly integrated SoC platform, designed to ease the development and integration process and further reduce development costs and time to market for CEVA-X-based designs.

CEVA-XS1200 utilizes multiple innovative power-saving techniques such as activating the system modules only when needed; level-two memory architecture and caching; adjustable DSP system speed; decentralized interconnect topology; and selective hardware/software wake-up events. In addition, the CEVA-XS1200 contains a 3D DMA co-processor and glue-less TDM ports, providing designers with the ability to target high-performance applications such as multimedia, communications, VoIP, storage and more. The platform includes a complete set of DSP peripherals and interfaces, including an interrupt controller, power management unit, timers and general purpose I/Os, and it also provides easy means of connectivity to other systems present on chip.