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One World Standard ( XPP ) In The Wireless World
13th November 2002

Innumerable committees are working on a global scale, defining and confirming new standards for next-generation applications. How can manufacturers of wireless mobile
terminals that integrate voice, audio, video and data applications, with arithmetic performance and power consumption demands that surpass those
provided by traditional microprocessors and DSPs, keep pace with the global standardization activity?

Picture shows Dr. Eckardt Bihler, CEO of PACT.

With the XPP Technology PACT offers a software-programmable platform, which gives manufacturers of integrated devices the required flexibility and
dynamism in the development process. The XPP replaces costly ASIC developments in a variety of fields, hereby lowering the thresholds to new product variants and enabling a flexible customization of final products according to market demands.

XPP-based products are software-defined, permitting an adjustment of the
finished product, shortening the time-to-market and thus reducing the total
costs of the product.

Complete Global Mobility
Wireless mobile terminals as well as wireless infrastructure applications
are best examples of the above-mentioned problem. Personal Digital Assistants
(PDAs) with wireless capabilities are already widespread today. Future
wireless devices must adapt both dynamically to the local reception conditions
and the differing communication standards, providing the capability to process
large data streams of voice, audio, video and data. The XPP takes over the
computation of all the wide-band data streams. A scenario can be as follows:
The transmission standard available is loaded as a configuration into the
processor -- within buildings, for instance, the OFDM decoder for Wireless
LANs (HiperLan/2 or IEE802.11a). The fast reconfiguration of the processor
permits it to load the modules required in each case dynamically. This is
comparable to task switching in real time operating systems. The same XPP
array is operated outside of buildings as a RAKE receiver for UMTS and/or
W-CDMA. The necessary modules such as the Fourier transformation and
demodulator are dynamically configurable in this case as well. On the
application level, an XPP array as a coprocessor relieves the microprocessor
of the computationally intensive tasks, represented by MPEG/JPEG and audio
codecs. The computational performance of the main processor is thus at the
user's disposal, providing for a comfortable operating environment by means of
a graphical user interface.
So far, each separate application (e.g. transmission standard) in a mobile
terminal required a dedicated ASIC that had to be developed and integrated
into the equipment in the form of silicon space. Substantial development and
production costs therefore defeated multi-standard mobile terminal devices.
The XPP Technology enables a shift in the development of new devices away from
hardware into pure software design.

The XPP Architecture
The XPP is a reconfigurable processor characterized by a patented set of
features:

-- Scaleable array of ALUs (4x4 to 8x8)
-- Distributed RAM Blocks with integrated ALUs
-- Packet-oriented communication network for data streams
-- Particularly fast and data synchronous reconfiguration
-- Conditional program branch handling
-- Low power consumption

Only the combination of all these characteristics makes a reconfigurable
processor actually programmable. For the program development no hardware
design methods are necessary like the input using an HDL. In order to use the
parallel characteristics of XPP optimally, the algorithm (e.g. the internal
loop) should be present as a data flow graph. This graph is then mapped
directly onto the array in the form of ALUs and RAM. The fast reconfiguration
makes it possible to load and execute several graphs sequentially.

The Development Platform
PACT offers an integrated development platform for the design and
verification of target systems. The platform is based on a PCI board
integrating the following components:

-- XPP64 -- A processor with an 8x8 Array and 16 RAM Blocks, 0.13 um CMOS
technology
-- Microcontroller (MIPS / ARM) with peripherals, RAM and flash
-- 4 independent external SRAMs for the XPP
-- Matrix for controlling the data streams
-- High-Speed AD/DA Converter and FPDP Bus

Systems such as

-- Software Defined Radio (SDR)
-- W-CDMA / DAB / DVB / IEE802.11x
-- MPEG / JPEG Codecs
-- Image Processing
-- Pattern Recognition

can be simulated and verified by this platform. From this, custom-made XPP
processors be ported as Intellectual Property (IP) on a final SoC. The
integrated development software contains the tools for the microcontroller
(MIPS/ARM) and the XPP Development Suite. Communication Libraries enable a
comfortable communication between the individual components. Application
Libraries e.g. for baseband processing and MPEG enable fast results.
The board will be available in the first quarter 2003. Application
Libraries and the design tools with the software simulator are currently
already available.

 
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